MCHC908JW32FAE Freescale Semiconductor, MCHC908JW32FAE Datasheet - Page 189

• Manufacturer Part Number: MCHC908JW32FAE
• Description: IC MCU 32K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908JW32FAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, USB
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 48
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: HC08JW
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, USB
• Number Of Programmable I/os: 29
• Number Of Timers: 2
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

ACK — IRQ Interrupt Request Acknowledge Bit
IMASK — IRQ Interrupt Mask Bit
MODE — IRQ Edge/Level Select Bit
14.8 IRQ Option Control Register
The IRQ option control register controls and monitors the external interrupt function available on the PTE3
pin. It also disables/enables the pullup resistor on the IRQ pin.
PTE3IF — PTE3 Interrupt Flag
PTE3IE — PTE3 Interrupt Enable
IRQPD — IRQ Pullup Disable
Freescale Semiconductor
Writing a logic 1 to this write-only bit clears the IRQ latch. ACK always reads as logic 0. Reset clears
ACK.
Writing a logic 1 to this read/write bit disables IRQ interrupt requests. Reset clears IMASK.
This read/write bit controls the triggering sensitivity of the IRQ pin. Reset clears MODE.
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•
•
This read-only status bit is high when a falling edge on PTE3 pin is detected. PTE3IF bit clears when
the IOCR is read.
This read/write bit enables or disables the interrupt function on the PTE3 pin to trigger the IRQ
interrupt. Setting the PTE3IE bit and clearing the USBEN bit in the USB address register configure the
PTE3 pin for interrupt function to the IRQ interrupt. Setting PTE3IE also enables the internal pullup on
PTE3 pin.
This read/write bit controls the pullup option for the IRQ pin.
1 = IRQ interrupt requests disabled
0 = IRQ interrupt requests enabled
1 = IRQ interrupt requests on falling edges and low levels
0 = IRQ interrupt requests on falling edges only
1 = falling edge on PTE3 is detected and PTE3IE is set
0 = falling edge on PTE3 is not detected or PTE3IE is clear
1 = PTE3 interrupt enabled; triggers IRQ interrupt
0 = PTE3 interrupt disabled
1 = Internal pullup is disconnected
0 = Internal pull-up is connected between IRQ pin and V
Controls pullup option on IRQ pin
Enables PTE3 pin for external interrupts to IRQ
Shows the state of the PTE3 interrupt flag
Address:
Reset:
Read:
Write:
$001C
Bit 7
0
0
Figure 14-4. IRQ Option Control Register (IOCR)
= Unimplemented
6
0
0
MC68HC908JW32 Data Sheet, Rev. 6
5
0
0
4
0
0
3
0
0
DD
PTE3IF
2
0
PTE3IE
1
0
IRQ Option Control Register
IRQPD
Bit 0
0
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