MCHC908JW32FAE Freescale Semiconductor, MCHC908JW32FAE Datasheet - Page 93

IC MCU 32K FLASH 8MHZ 48-LQFP

MCHC908JW32FAE

Manufacturer Part Number
MCHC908JW32FAE
Description
IC MCU 32K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908JW32FAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, USB
Peripherals
LED, LVD, POR, PWM
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
48
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
HC08JW
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USB
Number Of Programmable I/os
29
Number Of Timers
2
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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Chapter 7
Monitor Mode (MON)
7.1 Introduction
This section describes the monitor mode (MON). The monitor mode allows complete testing of the MCU
through a single-wire interface with a host computer.
7.2 Features
Features of the monitor mode include:
7.3 Functional Description
The monitor module receives and executes commands from a host computer.
example circuit used to enter monitor mode and communicate with a host computer via a standard
RS-232 interface.
Simple monitor commands can access any memory address. In monitor mode, the MCU can execute
code downloaded into RAM by a host computer while most MCU pins retain normal operating mode
functions. All communication between the host computer and the MCU is through the PTA0 pin. A
level-shifting and multiplexing interface is required between PTA0 and the host computer. PTA0 is used
in a wired-OR configuration and requires a pullup resistor.
The monitor code allows enabling the PLL to generate the internal clock, provided the reset vector is
blank, when the device is being clocked by a low-frequency crystal. This entry method, which is enabled
when IRQ is held low out of reset, is intended to support serial communication/ programming at 9600
baud in monitor mode.
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the ROM difficult for
Freescale Semiconductor
unauthorized users.
Normal user-mode pin functionality
One pin dedicated to serial communication between monitor ROM and host computer
Standard mark/space non-return-to-zero (NRZ) communication with host computer
Execution of code in RAM or ROM
ROM memory security feature
960 bytes monitor ROM code size ($FC00–$FDFF and $FE10–$FFCE)
Standard monitor mode entry if high voltage, V
MC68HC908JW32 Data Sheet, Rev. 6
(1)
TST
, is applied to IRQ
Figure 7-1
shows an
93

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