MCHC908JW32FAE Freescale Semiconductor, MCHC908JW32FAE Datasheet - Page 203

• Manufacturer Part Number: MCHC908JW32FAE
• Description: IC MCU 32K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908JW32FAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, USB
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 48
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: HC08JW
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, USB
• Number Of Programmable I/os: 29
• Number Of Timers: 2
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

17.4 LVI Status Register
The LVI status register (LVISR) indicates if the V
LVIOUT — LVI Output Bit
17.5 LVI Interrupts
The LVI module does not generate interrupt requests.
17.6 Low-Power Modes
The STOP and WAIT instructions put the MCU in low power-consumption standby modes.
17.6.1 Wait Mode
If enabled, the LVI module remains active in wait mode. If enabled to generate resets, the LVI module can
generate a reset and bring the MCU out of wait mode.
17.6.2 Stop Mode
If enabled in stop mode (LVISTOP = 1), the LVI module remains active in stop mode. If enabled to
generate resets (LVIRSTD = 0), the LVI module can generate a reset and bring the MCU out of stop
mode.
Freescale Semiconductor
This read-only flag becomes set when the V
clears the LVIOUT bit.
Address:
Reset:
Read:
Write:
LVIOUT
$FE0F
Bit 7
0
V
TRIPF1
= Unimplemented
V
V
6
0
0
DD
DD
V
Table 17-1. LVIOUT Bit Indication
Figure 17-3. LVI Status Register
< V
DD
MC68HC908JW32 Data Sheet, Rev. 6
> V
< V
, V
DD
TRIPR1
TRIPF1
REG
< V
5
0
0
TRIPR1
DD
DD
or V
4
0
0
voltage was detected below V
REG
falls below their respective trip voltages. Reset
Previous value
3
0
0
LVIOUT
0
1
2
0
0
1
0
0
TRIPF1
LVI Status Register
Bit 0
0
0
.
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