MCHC908JW32FAE Freescale Semiconductor, MCHC908JW32FAE Datasheet - Page 96

• Manufacturer Part Number: MCHC908JW32FAE
• Description: IC MCU 32K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908JW32FAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, USB
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 48
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: HC08JW
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, USB
• Number Of Programmable I/os: 29
• Number Of Timers: 2
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Monitor Mode (MON)
Enter monitor mode with pin configuration shown in
rising edge of RST latches monitor mode. Once monitor mode is latched, the values on the specified pins
can change (except for PTA1, where it should be held until after security, see
Once out of reset, the MCU waits for the host to send eight security bytes. (See
security bytes, the MCU sends a break signal (10 consecutive logic 0s) to the host, indicating that it is
ready to receive a command.
In monitor mode, the MCU uses different vectors for reset, SWI (software interrupt), and break interrupt
than those for user mode. The alternate vectors are in the $FE page instead of the $FF page and allow
code execution from the internal monitor firmware instead of user code.
Table 7-2
7.3.2 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
Transmit and receive baud rates must be identical.
7.3.3 Break Signal
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When the monitor receives a break signal,
it drives the PTA0 pin high for the duration of two bits and then echoes back the break signal.
96
summarizes the differences between user mode and monitor mode vectors.
Exiting monitor mode after it has been initiated by having a blank reset
vector requires a power-on reset (POR). Pulling RST low will not exit
monitor mode in this situation.
START
BIT
Modes
Monitor
User
0
BIT 0
1
2
MISSING STOP BIT
BIT 1
3
Table 7-2. Mode Differences (Vectors)
Vector
$FFFE
$FEFE
Reset
High
4
Figure 7-2. Monitor Data Format
BIT 2
Figure 7-3. Break Transaction
MC68HC908JW32 Data Sheet, Rev. 6
5
6
BIT 3
Vector
$FFFF
$FEFF
Reset
Low
7
BIT 4
NOTE
Figure 7-1
$FEFC
Vector
$FFFC
Break
High
BIT 5
Functions
2-STOP BIT DELAY BEFORE ZERO ECHO
BIT 6
0
Vector
$FFFD
$FEFD
Break
by pulling RST low and then high. The
Low
1
BIT 7
2
3
$FEFC
Vector
$FFFC
STOP
High
SWI
BIT
4
5
7.4
START
NEXT
BIT
7.4
6
Security).
Vector
$FFFD
$FEFD
Freescale Semiconductor
Security.) After the
Low
SWI
7