MCHC908JW32FAE Freescale Semiconductor, MCHC908JW32FAE Datasheet - Page 83

IC MCU 32K FLASH 8MHZ 48-LQFP

MCHC908JW32FAE

Manufacturer Part Number
MCHC908JW32FAE
Description
IC MCU 32K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908JW32FAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, USB
Peripherals
LED, LVD, POR, PWM
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
48
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
HC08JW
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USB
Number Of Programmable I/os
29
Number Of Timers
2
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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latched by the SIM, no other interrupt can take precedence, regardless of priority, until the latched
interrupt is serviced (or the I bit is cleared). (See
6.5.1.1 Hardware Interrupts
A hardware interrupt does not stop the current instruction. Processing of a hardware interrupt begins after
completion of the current instruction. When the current instruction is complete, the SIM checks all pending
hardware interrupts. If interrupts are not masked (I bit clear in the condition code register) and if the
corresponding interrupt enable bit is set, the SIM proceeds with interrupt processing; otherwise, the next
instruction is fetched and executed.
Freescale Semiconductor
AS MANY INTERRUPTS
AS EXIST ON CHIP
YES
Figure 6-10. Interrupt Processing
INSTRUCTION?
INSTRUCTION?
INSTRUCTION
FROM RESET
MC68HC908JW32 Data Sheet, Rev. 6
INTERRUPT?
FETCH NEXT
INTERRUPT?
I-BIT SET?
I BIT SET?
BREAK
IRQ1
SWI
RTI
NO
NO
NO
NO
NO
Figure
YES
YES
YES
YES
LOAD PC WITH INTERRUPT VECTOR
UNSTACK CPU REGISTERS
6-10.)
EXECUTE INSTRUCTION
STACK CPU REGISTERS
SET I-BIT
Exception Control
83

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