MCHC908JW32FAE Freescale Semiconductor, MCHC908JW32FAE Datasheet - Page 97

• Manufacturer Part Number: MCHC908JW32FAE
• Description: IC MCU 32K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908JW32FAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, USB
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 48
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: HC08JW
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, USB
• Number Of Programmable I/os: 29
• Number Of Timers: 2
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

7.3.4 Baud Rate
The communication baud rate is controlled by the crystal frequency and the state of the PTB0 pin (when
IRQ1 is set to V
PTB0 pin is at logic 0 upon entry into monitor mode, the divide by ratio is 512.
If monitor mode was entered with V
This condition for monitor mode entry requires that the reset vector is blank.
Table 7-3
standard baud rates can be accomplished using proportionally higher or lower frequency generators. If
using a crystal as the clock source, be aware of the upper frequency limit that the internal clock module
can handle.
7.3.5 Commands
The monitor ROM firmware uses these commands:
The monitor ROM firmware echoes each received byte back to the PTA0 pin for error checking. An 11-bit
delay at the end of each command allows the host to send a break character to cancel the command. A
delay of two bit times occurs before each echo and before READ, IREAD, or READSP data is returned.
The data returned by a read command appears after the echo of the last byte of the command.
Freescale Semiconductor
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READ (read memory)
WRITE (write memory)
IREAD (indexed read)
IWRITE (indexed write)
READSP (read stack pointer)
RUN (run user program)
lists external frequencies required to achieve a standard baud rate of 9600 BPS. Other
TST
4.9152 MHz
9.8304 MHz
9.8304 MHz
Frequency
External
) upon entry into monitor mode. When PTB0 is high, the divide by ratio is 1024. If the
Wait one bit time after each echo before sending the next byte.
Table 7-3. Monitor Baud Rate Selection
DD
IRQ1
V
V
V
MC68HC908JW32 Data Sheet, Rev. 6
TST
TST
DD
on IRQ1, then the divide by ratio is set at 1024, regardless of PTB0.
PTB0
X
0
1
NOTE
2.4576 MHz
2.4576 MHz
2.4576 MHz
Frequency
Internal
Baud Rate
(BPS)
9600
9600
9600
Functional Description
97