HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 295

• Manufacturer Part Number: HD64F3644PV
• Description: IC H8/3644 MCU FLASH 32K 64SDIP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3644PV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 1 Bit 0 Write Inhibit (B0WI): Bit 1 controls the writing of data to bit 0 in TCSRW.
This bit is always read as 1. Data written to this bit is not stored.
Bit 1: B0WI
0
1
Bit 0 Watchdog Timer Reset (WRST): Bit 0 indicates that TCW has overflowed, generating
an internal reset signal. The internal reset signal generated by the overflow resets the entire chip.
WRST is cleared to 0 by a reset from the RES pin, or when software writes 0.
Bit 0: WRST
0
1
Timer Counter W (TCW)
TCW is an 8-bit read/write up-counter, which is incremented by internal clock input. The input
clock is /8192. The TCW value can always be written or read by the CPU.
When TCW overflows from H'FF to H'00, an internal reset signal is generated and WRST is set to
1 in TCSRW. Upon reset, TCW is initialized to H'00.
Bit
Initial value
Read/Write
TCW7
R/W
Description
Bit 0 is write-enabled
Bit 0 is write-protected
Clearing conditions:
Setting condition:
When TCW overflows and an internal reset signal is generated
Description
7
0
Reset by RES pin
When TCSRWE = 1, and 0 is written in both B0WI and WRST
TCW6
R/W
0
6
TCW5
R/W
0
5
TCW4
R/W
4
0
Rev. 6.00 Sep 12, 2006 page 273 of 526
TCW3
R/W
3
0
TCW2
R/W
2
0
REJ09B0326-0600
TCW1
Section 9 Timers
R/W
1
0
(initial value)
(initial value)
TCW0
R/W
0
0