HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 78

IC H8/3644 MCU FLASH 32K 64SDIP

HD64F3644PV

Manufacturer Part Number
HD64F3644PV
Description
IC H8/3644 MCU FLASH 32K 64SDIP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644PV

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3644PV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
HD64F3644PV
Manufacturer:
RENESAS
Quantity:
25
Section 2 CPU
As a result of this operation, bit 0 in PCR3 becomes 0, making P3
and 6 in PCR3 change to 1, so that P3
To avoid this problem, store a copy of the PCR3 data in a work area in memory. Perform the bit
manipulation on the data in the work area, then write this data to PCR3.
[A: Prior to executing BCLR]
[B: BCLR instruction executed]
[C: After executing BCLR]
Rev. 6.00 Sep 12, 2006 page 56 of 526
REJ09B0326-0600
Input/output
Pin state
PCR3
PDR3
RAM0
Input/output
Pin state
PCR3
PDR3
RAM0
MOV. B
MOV. B
MOV. B
MOV. B
MOV. B
BCLR
#0
#3F,
R0L,
R0L,
@RAM0, R0L
R0L,
,
P3
Input
Low
level
0
1
0
P3
Input
Low
level
0
1
0
7
7
R0L
@RAM0
@PCR3
@PCR3
@RAM0
P3
Input
High
level
0
0
0
P3
Input
High
level
0
0
0
6
6
7
P3
Output
Low
level
1
0
1
P3
Output
Low
level
1
0
1
The PCR3 value (H'3F) is written to a work area in
memory (RAM0) as well as to PCR3.
The BCLR instruction is executed designating the PCR3
work area (RAM0).
The work area (RAM0) value is written to PCR3.
and P3
5
5
6
change from input pins to output pins.
P3
Output
Low
level
1
0
1
P3
Output
Low
level
1
0
1
4
4
P3
Output
Low
level
1
0
1
P3
Output
Low
level
1
0
1
3
3
0
an input port. However, bits 7
P3
Output
Low
level
1
0
1
P3
Output
Low
level
1
0
1
2
2
P3
Output
Low
level
1
0
1
P3
Output
Low
level
1
0
1
1
1
P3
Output
Low
level
1
0
1
P3
Output
High
level
0
0
0
0
0

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