UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 101

• Manufacturer Part Number: UPD78F9222MC(T)-5A4-A
• Description: 8BIT MCU, 4K FLASH, 256B RAM, 78F9222
• Manufacturer: NEC

Specifications of UPD78F9222MC(T)-5A4-A

• Controller Family/series: UPD78
• No. Of I/o's: 17
• Ram Memory Size: 256Byte
• Cpu Speed: 10MHz
• No. Of Timers: 4
• No. Of: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

(1) Pulse width measurement with free-running counter and one capture register
Remark 0/1: Setting 0 or 1 allows another function to be used simultaneously with pulse width measurement.
Specify both the rising and falling edges as the valid edges of the TI000 pin, by using bits 4 and 5 (ES000 and
ES010) of PRM00.
When 16-bit timer counter 00 (TM00) is operated in free-running mode, and the valid edge specified by
PRM00 is input, the value of TM00 is taken into 16-bit timer capture/compare register 010 (CR010) and an
external interrupt request signal (INTTM010) is set.
Sampling is performed using the count clock selected by PRM00, and a capture operation is only performed
when a valid level of the TI000 pin is detected twice, thus eliminating noise with a short pulse width.
Caution The measurable pulse width in this operation example is up to 1 cycle of the timer counter.
Figure 6-18. Control Register Settings for Pulse Width Measurement with Free-Running Counter
See the description of the respective control registers for details.
PRM00
TMC00
CRC00
and One Capture Register (When TI000 and CR010 Are Used)
ES101
0/1
7
0
7
0
(c) 16-bit timer mode control register 00 (TMC00)
(a) Capture/compare control register 00 (CRC00)
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
ES100
0/1
6
0
(b) Prescaler mode register 00 (PRM00)
6
0
ES010
5
0
5
0
1
User’s Manual U16898EJ5V0UD
ES000
4
0
4
0
1
TMC003
3
0
0
3
0
CRC002
TMC002
1
1
2
0
CRC001
TMC001
PRM001
0/1
0/1
0/1
CRC000
OVF00
PRM000
0/1
0
0
CR000 used as compare register
CR010 used as capture register
Free-running mode
Selects count clock (setting “11” is prohibited).
Specifies both edges for pulse width detection.
Setting invalid (setting “10” is prohibited.)
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