UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 242

• Manufacturer Part Number: UPD78F9222MC(T)-5A4-A
• Description: 8BIT MCU, 4K FLASH, 256B RAM, 78F9222
• Manufacturer: NEC

Specifications of UPD78F9222MC(T)-5A4-A

• Controller Family/series: UPD78
• No. Of I/o's: 17
• Ram Memory Size: 256Byte
• Cpu Speed: 10MHz
• No. Of Timers: 4
• No. Of: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

242
High-speed internal oscillation clock or
Internal reset signal
Notes 1.
Remark When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
Notes 1.
Remarks 1. f
Crystal/ceramic
oscillation clock
(except P130)
2.
2.
Port pin
Port pin
RESET
(P130)
effected, the output signal of P130 can be dummy-output as the reset signal to the CPU.
2. When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
Internal reset signal
The operation stop time is 277
Set high level output using software.
The operation stop time is 276
Set high level output using software.
external clock input
effected, the output signal of P130 can be dummy-output as the reset signal to the CPU.
X
: System clock oscillation frequency
(except P130)
<1> With high-speed internal oscillation clock or external clock input
CPU clock
Normal operation
Port pin
Port pin
RESET
(P130)
in progress
Figure 14-2. Timing of Reset by RESET Input
Normal operation
<2> With crystal/ceramic oscillation clock
in progress
CHAPTER 14 RESET FUNCTION
100 ns (TYP.)
Delay
User’s Manual U16898EJ5V0UD
µ
µ
s (MIN.), 544
s (MIN.), 544
100 ns (TYP.)
(oscillation stops)
Delay
Reset period
100 ns (TYP.)
(oscillation stops)
Delay
µ
µ
Reset period
s (TYP.), and 1.075 ms (MAX.).
s (TYP.), and 1.074 ms (MAX.).
100 ns (TYP.)
Delay
Oscillation stabilization
time (2
Operation stops because option
byte is referenced
10
/f
X
to 2
Hi-Z
Operation stops because option
byte is referenced
17
/f
Normal operation (reset processing, CPU clock)
X
)
Hi-Z
Normal operation
(reset processing, CPU clock)
Note 1
.
Note 1
.
Note 2
Note 2