UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 79

8BIT MCU, 4K FLASH, 256B RAM, 78F9222

UPD78F9222MC(T)-5A4-A

Manufacturer Part Number
UPD78F9222MC(T)-5A4-A
Description
8BIT MCU, 4K FLASH, 256B RAM, 78F9222
Manufacturer
NEC
Datasheet

Specifications of UPD78F9222MC(T)-5A4-A

Controller Family/series
UPD78
No. Of I/o's
17
Ram Memory Size
256Byte
Cpu Speed
10MHz
No. Of Timers
4
No. Of
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal

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Notes 1.
(a) The internal reset signal is generated by the power-on-clear function on power application, the option byte is
(b) After high-speed internal oscillation clock is generated, the option byte is referenced and the system clock is
(c) If the system clock is the crystal/ceramic oscillator clock, it starts operating as the CPU clock after clock
referenced after reset, and the system clock is selected.
selected. In this case, the crystal/ceramic oscillator clock is selected as the system clock.
oscillation is stabilized. The wait time is selected by the option byte. For details, refer to CHAPTER 17
OPTION BYTE.
2.
System clock
Internal reset
CPU clock
Operation stop time is 276
The clock oscillation stabilization time for default start is selected by the option byte. For details, refer
to CHAPTER 17 OPTION BYTE. The oscillation stabilization time that elapses after the STOP mode
is released is selected by the oscillation stabilization time select register (OSTS).
RESET
V
Figure 5-10. Timing Chart of Default Start by Crystal/Ceramic Oscillator
DD
H
(a)
System clock is selected.
(Operation stops
CHAPTER 5 CLOCK GENERATORS
Option byte is read.
µ
s (MIN.), 544
User’s Manual U16898EJ5V0UD
Note 1
)
µ
s (TYP.), and 1.074 ms (MAX.).
(b)
Clock oscillation
stabilization
time
Note 2
(c)
PCC = 02H, PPCC = 02H
Crystal/ceramic
oscillator clock
79

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