UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 264

8BIT MCU, 4K FLASH, 256B RAM, 78F9222

UPD78F9222MC(T)-5A4-A

Manufacturer Part Number
UPD78F9222MC(T)-5A4-A
Description
8BIT MCU, 4K FLASH, 256B RAM, 78F9222
Manufacturer
NEC
Datasheet

Specifications of UPD78F9222MC(T)-5A4-A

Controller Family/series
UPD78
No. Of I/o's
17
Ram Memory Size
256Byte
Cpu Speed
10MHz
No. Of Timers
4
No. Of
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal

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17.3 Caution When the RESET Pin Is Used as an Input-Only Port Pin (P34)
programmer) an already-written device which has been set as “The RESET pin is used as an input-only port pin
(P34)” by the option byte function.
to.
264
Be aware of the following when re-erasing/-writing (by on-board programming using a dedicated flash memory
Before supplying power to the target system, connect a dedicated flash memory programmer and turn its power on.
If the power is supplied to the target system beforehand, the flash memory programming mode cannot be switched
Cautions 1. If it is selected that low-speed internal oscillator cannot be stopped, the count clock to
Remarks 1. ( ): f
LIOCP
1
0
2. If it is selected that low-speed internal oscillator can be stopped by software, supply of
2. For the oscillation stabilization time of the resonator, refer to the characteristics of the resonator
3. An example of software coding for setting the option bytes is shown below.
4. For details on the timing at which the option byte is referenced, see CHAPTER 14 RESET
to be used.
FUNCTION.
OPB OSEG AT 0080H
DB 10010001B
While the low-speed internal oscillator is operating (LSRSTOP = 0), the clock can be
the watchdog timer (WDT) is fixed to low-speed internal oscillation clock.
the count clock to WDT is stopped in the HALT/STOP mode, regardless of the setting of
bit 0 (LSRSTOP) of the low-speed internal oscillation mode register (LSRCM). Similarly,
clock supply is also stopped when a clock other than the low-speed internal oscillation
clock is selected as a count clock to WDT.
supplied to the 8-bit timer H1 even in the STOP mode.
Cannot be stopped (oscillation does not stop even if 1 is written to the LSRSTOP bit)
Can be stopped by software (oscillation stops when 1 is written to the LSRSTOP bit)
X
= 10 MHz
Figure 17-2. Format of Option Byte (2/2)
CHAPTER 17 OPTION BYTE
User’s Manual U16898EJ5V0UD
; Set to option byte
; Low-speed internal oscillator cannot be stopped
; The system clock is a crystal or ceramic resonator.
; The RESET pin is used as an input-only port pin (P34).
; Minimum oscillation stabilization time (
Low-speed internal oscillates
2
10
/f
X
)

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