UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 225

• Manufacturer Part Number: UPD78F9222MC(T)-5A4-A
• Description: 8BIT MCU, 4K FLASH, 256B RAM, 78F9222
• Manufacturer: NEC

Specifications of UPD78F9222MC(T)-5A4-A

• Controller Family/series: UPD78
• No. Of I/o's: 17
• Ram Memory Size: 256Byte
• Cpu Speed: 10MHz
• No. Of Timers: 4
• No. Of: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

12.4 Interrupt Servicing Operation
12.4.1 Maskable interrupt request acknowledgment operation
corresponding interrupt mask flag is cleared to 0. If the interrupt enabled status is in effect (when the IE flag is set to
1), then the request is acknowledged as a vector interrupt.
shown in Table 12-3.
from the interrupt request assigned the highest priority.
that order, the IE flag is reset to 0, and the data in the vector table determined for each interrupt request is loaded to
the PC, and execution branches.
A maskable interrupt request can be acknowledged when the interrupt request flag is set to 1 and the
The time required to start the vectored interrupt servicing after a maskable interrupt request has been generated is
See Figures 12-8 and 12-9 for the interrupt request acknowledgment timing.
When two or more maskable interrupt requests are generated at the same time, they are acknowledged starting
A pending interrupt is acknowledged when a status in which it can be acknowledged is set.
Figure 12-7 shows the algorithm of interrupt request acknowledgment.
When a maskable interrupt request is acknowledged, the contents of the PSW and PC are saved to the stack in
To return from interrupt servicing, use the RETI instruction.
Table 12-3. Time from Generation of Maskable Interrupt Request to Servicing
Note The wait time is maximum when an interrupt
Remark
9 clocks
request is generated immediately before BT and
BF instructions.
Minimum Time
CHAPTER 12 INTERRUPT FUNCTIONS
1 clock:
User’s Manual U16898EJ5V0UD
f
CPU
1
(f
CPU
: CPU clock)
19 clocks
Maximum Time
Note
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