UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 148
UPD78F9222MC(T)-5A4-A
Manufacturer Part Number
UPD78F9222MC(T)-5A4-A
Description
8BIT MCU, 4K FLASH, 256B RAM, 78F9222
Manufacturer
NEC
Datasheet
1.UPD78F9222MCT-5A4-A.pdf
(414 pages)
Specifications of UPD78F9222MC(T)-5A4-A
Controller Family/series
UPD78
No. Of I/o's
17
Ram Memory Size
256Byte
Cpu Speed
10MHz
No. Of Timers
4
No. Of
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
Available stocks
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Part Number:
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Quantity:
1 000
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Part Number:
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Part Number:
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Quantity:
20 000
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148
Watchdog timer clock
source
Operation after reset
Operation mode
selection
Features
Notes 1.
Remarks 1. f
2.
2. f
As long as power is being supplied, low-speed internal oscillator cannot be stopped (except in the reset
period).
The conditions under which clock supply to the watchdog timer is stopped differ depending on the
clock source of the watchdog timer.
<1> If the clock source is f
<2> If the clock source is f
RL
X
: Oscillation frequency of system clock
: Low-speed internal oscillation clock oscillation frequency
conditions.
• When f
• In HALT/STOP mode
• During oscillation stabilization time
conditions.
• If the CPU clock is f
• In HALT/STOP mode
Table 9-2. Option Byte Setting and Watchdog Timer Operation Mode
Operation starts with the maximum interval (2
Fixed to f
The interval can be changed only once.
The watchdog timer cannot be stopped.
Low-Speed Internal Oscillator Cannot Be Stopped Low-Speed Internal Oscillator Can Be Stopped by Software
X
is stopped
RL
Note 1
.
CHAPTER 9 WATCHDOG TIMER
X
and if f
RL
X
User’s Manual U16898EJ5V0UD
, clock supply to the watchdog timer is stopped under the following
, clock supply to the watchdog timer is stopped under the following
RL
is stopped by software before execution of the STOP instruction
Option Byte Setting
18
/f
RL
). Operation starts with the maximum interval
• Selectable by software (f
• When reset is released: f
(2
The clock selection/interval can be changed only
once.
The watchdog timer can be stopped
18
/f
RL
).
X
RL
, f
RL
or stopped)
Note 2
.
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