UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 223

8BIT MCU, 4K FLASH, 256B RAM, 78F9222

UPD78F9222MC(T)-5A4-A

Manufacturer Part Number
UPD78F9222MC(T)-5A4-A
Description
8BIT MCU, 4K FLASH, 256B RAM, 78F9222
Manufacturer
NEC
Datasheet

Specifications of UPD78F9222MC(T)-5A4-A

Controller Family/series
UPD78
No. Of I/o's
17
Ram Memory Size
256Byte
Cpu Speed
10MHz
No. Of Timers
4
No. Of
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal

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Address: FFECH
Symbol
INTM0
(3)
External interrupt mode register 0 (INTM0)
This register is used to set the valid edge of INTP0 to INTP2.
INTM0 is set with an 8-bit memory manipulation instruction.
Reset signal generation clears INTM0 to 00H.
Cautions 1. Be sure to clear bits 0 and 1 to 0.
ES21
ES21
ES11
ES01
7
0
0
1
1
0
0
1
1
0
0
1
1
After reset: 00H
ES20
ES20
ES10
ES00
2. Before setting the INTM0 register, be sure to set the corresponding interrupt mask flag
6
0
1
0
1
0
1
0
1
0
1
0
1
Figure 12-4. Format of External Interrupt Mode Register 0 (INTM0)
(××MK× = 1) to disable interrupts. After setting the INTM0 register, clear the interrupt
request flag (××IF× = 0), then clear the interrupt mask flag (××MK× = 0), which will
enable interrupts.
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
ES11
5
R/W
ES10
CHAPTER 12 INTERRUPT FUNCTIONS
4
User’s Manual U16898EJ5V0UD
ES01
3
ES00
2
INTP2 valid edge selection
INTP1 valid edge selection
INTP0 valid edge selection
1
0
0
0
223

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