UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 121
UPD78F9222MC(T)-5A4-A
Manufacturer Part Number
UPD78F9222MC(T)-5A4-A
Description
8BIT MCU, 4K FLASH, 256B RAM, 78F9222
Manufacturer
NEC
Datasheet
1.UPD78F9222MCT-5A4-A.pdf
(414 pages)
Specifications of UPD78F9222MC(T)-5A4-A
Controller Family/series
UPD78
No. Of I/o's
17
Ram Memory Size
256Byte
Cpu Speed
10MHz
No. Of Timers
4
No. Of
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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(14) Conflicting operations
(15) Capture operation
(16) Compare operation
If the register read period and the input of the capture trigger conflict when CR000/CR010 is used as a capture
register, the capture trigger input takes precedence and the read data is undefined. Also, if the count stop of
the timer and the input of the capture trigger conflict, the captured data is undefined.
<1> If the valid edge of the TI000 pin is to be set as the count clock, do not set the clear/start mode and the
<2> When the CRC001 bit value is 1, capture is not performed in the CR000 register if both the rising and
<3> When the CRC001 bit value is 1, the TM00 count value is not captured in the CR000 register when a
<4> To ensure the reliability of the capture operation, the capture trigger requires a pulse longer than two
<5> The capture operation is performed at the fall of the count clock. An interrupt request input (INTTM0n0),
<6> To use two capture registers, set the TI000 and TI010 pins.
The capture operation may not be performed for CR0n0 set in compare mode even if a capture trigger is input.
Remark n = 0, 1
capture trigger at the valid edge of the TI000 pin.
falling edges have been selected as the valid edges of the TI000 pin.
valid edge of the TI010 pin is detected, but the input from the TI010 pin can be used as an external
interrupt source because INTTM000 is generated at that timing.
cycles of the count clock selected by prescaler mode register 00 (PRM00).
however, occurs at the rise of the next count clock.
CR010 capture value
Capture read signal
TM00 count value
Count clock
Edge input
INTTM010
Figure 6-38. Capture Register Data Retention Timing
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
N
User’s Manual U16898EJ5V0UD
X
N + 1
Capture
N + 2
N + 2
M
Capture, but
read value is
not guaranteed
M + 1
M + 1
M + 2
121
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