PIC18F8520-I/PT Microchip Technology Inc., PIC18F8520-I/PT Datasheet - Page 286
PIC18F8520-I/PT
Manufacturer Part Number
PIC18F8520-I/PT
Description
80 PIN, 32 KB FLASH, 2048 RAM, 68 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F8520-IPT.pdf
(380 pages)
Specifications of PIC18F8520-I/PT
A/d Inputs
16-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
68
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
80-pin TQFP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Speed
40 MHz
Timers
2-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8520-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F8520-I/PT
Manufacturer:
MICRCOHI
Quantity:
20 000
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PIC18F6520/8520/6620/8620/6720/8720
MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Example:
DS39609B-page 284
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
operation,
register ‘f’
Move f to f
[ label ]
0
0
(f
None
The contents of source register ‘f
are moved to destination register
‘f
anywhere in the 4096-byte data
space (000h to FFFh) and location
of destination ‘f
anywhere from 000h to FFFh.
Either source or destination can be
W (a useful special situation).
MOVFF is particularly useful for
transferring a data memory location
to a peripheral register (such as the
transmit buffer or an I/O port).
The MOVFF instruction cannot use
the PCL, TOSU, TOSH or TOSL as
the destination register.
2
2 (3)
MOVFF
d
s
Read
(src)
read
’. Location of source ‘f
)
1100
1111
Q2
No
=
=
=
=
f
f
s
d
f
d
0x33
0x11
0x33,
0x33
4095
4095
REG1, REG2
MOVFF f
ffff
ffff
operation
Process
Data
Q3
d
No
’ can also be
ffff
ffff
s
,f
d
s
register ‘f’
operation
’ can be
(dest)
Write
Q4
No
fff
fff
f
f
s
s
d
’
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
BSR register
BSR register
Q1
Read literal
Move literal to low nibble in BSR
[ label ]
0
k
None
The 8-bit literal ‘k’ is loaded into
the Bank Select Register (BSR).
1
1
MOVLB
0000
Q2
‘k’
=
=
k
2004 Microchip Technology Inc.
BSR
255
0x02
0x05
5
MOVLB k
0001
Process
Data
Q3
kkkk
literal ‘k’ to
Write
BSR
Q4
kkkk
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