PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 117
PEB22554
Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.PEB22554.pdf
(397 pages)
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Semiconductor Group
XRA…
XY0…XY4…
Transmit Spare Bits (Read/Write)
Value after RESET: 00
XSP
CASEN…
TT0…
7
CASEN
changing the transmit time-slot assignment) by the transmit system
highway unless register XC1 is written. Useful in loop-timed
applications. For proper operation the transmit elastic buffer (2
frames, SIC1.XBS1/0= 10) has to be enabled.
Transmit Remote Alarm
0…
1…
Spare Bits For National Use (Y-Bits, S
These bits are inserted in the service word of every other pulseframe
if S
they should be fixed to ‘1’.
If one of the time-slot 0 transparent modes is enabled (bit XSP.TT0 or
TSWM.TSA4-8), bits XSW.XY0…4 will be ignored.
Channel Associated Signaling Enable
0…
1…
Time-Slot 0 Transparent Mode
0…
1…
a
H
-bit register access is disabled (FMR1.ENSA = 0). If not used,
Normal operation.
All information for time-slot 0 at port XDI will be inserted in the
Normal operation.
Sends remote alarm towards remote end by setting bit 3 of the
service word. If time-slot 0 transparent mode is enabled via bit
XSP.TT0 or TSWM.TRA bit is set, bit XSW.XRA will be ignored.
Normal operation.
A one in this bit position will cause the transmitter to send the
CAS information stored in the XS1-16 registers in the
corresponding time slots.
outgoing pulseframe. All internal information of the QuadFALC
(framing, CRC, S
ignored. This function is mainly useful for system test
applications (test loops). Priority sequence of transparent
modes: XSP.TTO > TSWM.
TT0
EBP
117
a
/S
AXS
i
bit signaling, remote alarm) will be
XSIF
Operational Description E1
n
-Bits, S
XS13
a
-Bits)
0
XS15
PEB 22554
(x21)
09.98
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