PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 294

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PEB22554

Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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Interrupt Mask Register 0…4
Value after RESET: FF
IMR0
IMR1
IMR2
IMR3
IMR4
IMR0...IMR4...
Semiconductor Group
7
CASE
RME
FAR
XSP
ES
Interrupt Mask Register
Each interrupt source can generate an interrupt signal at port INT
(characteristics of the output stage are defined via register IPC). A ‘1’
in a bit position of IMR0…4 sets the mask active for the interrupt
status in ISR0…4. Masked interrupt statuses neither generate a
signal on INT, nor are they visible in register GIS. Moreover, they will
– not be displayed in the Interrupt Status Register if bit GCR.VIS is
– be displayed in the Interrupt Status Register if bit GCR.VIS is set to
After RESET, all interrupts are disabled.
RDO
SEC
XSN
RFS
LFA
set to ‘0’
‘1’.
H
, FF
MFAR
ALLS
H
ISF
, FF
H
, FF
LMFA
RMB
XDU
H
,FF
294
H
LLBSC
XMB
RSC
AIS
Operational Description T1 / J1
CRC6
LOS
PDEN
XLSC
RAR
RSN
0
XPR
RPF
RSP
RA
PEB 22554
(x14)
(x15)
(x16)
(x17)
(x18)
09.98

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