PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 81

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Payload Loop Back
To perform an effective circuit test a payload loop is implemented. The payload loop
back (FMR2.PLB) will loop the data stream from the receiver section back to transmitter
section. The looped data will pass the complete receiver including the wander and jitter
compensation in the receive elastic store and were output on pin RDO. Instead of the
data an AIS (FMR2.SAIS) could be sent to the system interface.
The framing bits, CRC4 and Spare bits are not looped, if XSP.TT0 =0. They are
originated by the QuadFALC transmitter. If the PLB is enabled the transmitter and the
data on pins XL1/2 or XDOP/XDON are clocked with SCLKR instead of SCLKX. If
XSP.TT0 = 1 the received time-slot 0 is sent transparently back to the line interface.
Data on the following pins are ignored: XDI, XSIG, TCLK, SCLKX, SYPX and XMFS. All
the received data is processed normally.
Figure 26
Payload Loop
Semiconductor Group
RL1
RL2
XL1
XL2
Clock +
Data
Recovery
Trans.
Framer
RCLK
Rec.
Framer
81
Elast.
Store
Elast.
Store
Functional Description E1
AIS-GEN
MUX
PEB 22554
RDO
SCLKR
XDI
SCLKX
ITS09748
09.98