PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 347

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

CRC Error Counter (READ)
CECL
CECH
CR15…CR0…
Semiconductor Group
7
7
CR15
CR7
CRC Errors
No function if CRC6 procedure or ESF format are disabled.
In ESF mode, the 16-bit counter will be incremented when a
multiframe has been received with a CRC error. CRC errors will not
be counted during asynchronous state. The error counter will not roll
over.
During alarm simulation, the counter is incremented once per
multiframe.
Clearing and updating the counter is done according to bit
FMR1.ECM.
If this bit is reset the error counter is permanently updated in the
buffer. For correct read access of the error counter bit DEC.DCEC
has to be set. With the rising edge of this bit updating the buffer will
be stopped and the error counter will be reset. Bit DEC.DCEC will
automatically be reset with reading the error counter high byte.
If FMR1.ECM is set every second (interrupt ISR3.SEC) the error
counter will be latched and then automatically reset. The latched error
counter state should be read within the next second.
347
Operational Description T1 / J1
0
0
CR0
CR8
PEB 22554
(x54)
(x55)
09.98