PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 331

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

XPC2 ...0…
Semiconductor Group
100…RSIG : Receive Signaling Data (Output)
101…DLR : Data Link Bit Receive (Output)
110…FREEZ : Freeze Signaling (Output)
111…RFSP : Receive Frame Synchronous Pulse (Output)
Transmit multifunction port configuration
The multifunction ports XP(A-D) are bidirectional. After Reset these
ports are configured as inputs. With the selection of the pin function
the In/Output configuration is also achieved. Each of the four different
input functions ( SYPX, XMFS, XSIG, TCLK ) may only be selected
once. No input function should be selected twice or more. SYPX and
XMFS should not be selected in parallel. Register PC1 configures
port XPA,while PC2 --> port XPB, PC3 --> port XPC and PC4 --> port
XPD.
000…SYPX: Synchronous Pulse Transmit (Input)
001…XMFS : Transmit Multiframe Synchronization (Input)
010…XSIG : Transmit Signaling Data (Input)
The received CAS multiframe is transmitted on this pin.
Time-slots on RSIG correlates directly to the time-slot
assignment on RDO. In system interface multiplex mode all
four received signaling data streams are merged into a single
rail data stream byte or bit interleaved on RSIG1.
Marks the DL-bit position within the data stream on RDO.
The freeze signaling status is active high by detecting a Loss of
Signal alarm, or a Loss of Frame Alignment or a receive slip
(pos. or neg.). It will hold high for at least one complete
multiframe after the alarm disappears. Setting SIC2.FFS
enforces a high on pin FREEZ.
Marks the frame begin in the receivers synchrounous state.
This marker is active low for 648 ns with a frequency of 8 kHz.
Together with register XC1/0 SYPX defines the frame begin on
the transmit system interface ports XDI and XSIG.
Together with register XC1/0 XMFS defines the frame and
multiframe begin on the transmit system interface ports XDI
and XSIG. Depending on PC5.CXMFS the signal on XMFS is
active high or low.
Input for transmit signaling data received from the signaling
highway. In system interface multiplex mode latching of the
data stream containing the 4 signaling multiframes is done byte
or bit interleaved on port XDI1. Optionally sampling of XSIG
data is controlled by the active high XSIGM marker.
331
Operational Description T1 / J1
PEB 22554
09.98