PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 212

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PEB22554

Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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7.4
Figure 43
Receive Clock System
Receive Line Interface
For data input, three different data types are supported:
• Ternary coded signals received at multifunction ports RL1 and RL2 from a -36 dB
• Digital dual rail signals received at ports RDIP and RDIN. The dual rail interface is
• Unipolar data at port ROID received from a fibre optical interface. The optical interface
Receive Short and Long Haul Interface
The QuadFALC has now an integrated short- and long- haul line interface, comprising a
receive equalization network, noise filtering and programmable line build-outs (LBO).
Semiconductor Group
1.5 MHz/
RL1/
RDIP/
ROID
RL
RDIN/
RCLKI
SYNC
MCLK
2 MHz
ternary interface. The ternary interface is selected if LIM1.DRS is reset.
selected if LIM1.DRS and FMR0.RC1 is set.
is selected if LIM1.DRS is set and FMR0.RC1 is reset.
2/
Receive Path
Equalizer
Peak
Detector
Clocking
Unit
LIM1 DRS
Detector
Analog-
LOS
.
212
Clock-Data
Recovery
DPLL
Functional Description T1 / J1
Detector
Alarm
Attenuator
Receive
DCO-R
Jitter
Decoder
Line
RCLK(N)
PEB 22554
RDATA
ITS10313
Receive
System
Interface
FSC
RCLK
09.98

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