PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 263

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Payload Loopback
To perform an effective circuit test a line loop is implemented.
If the payload loopback (FMR2.PLB) is activated the received 192 bits of payload data
will be looped back to the transmit direction. The framing bits, CRC6 and DL bits are not
looped, if FMR4.TM = 0. They are originated by the QuadFALC transmitter. If the PLB is
enabled the transmitter and the data on pins XL1/XDOP and XL2/XDON are clocked with
the working clock of the receive system interface (SCLKR). If FMR4.TM= 1 the received
FS/DL bit is sent transparently back to the line interface. Following pins are ignored: XDI,
XSIG, TCLK, SCLKX, SYPX and XMFS. All the received data is processed normally.
With bit FMR2.SAIS an AIS could be sent to the system interface via pin RDO.
Figure 65
Payload Loop
Semiconductor Group
RL1
RL2
XL1
XL2
Clock +
Data
Recovery
Trans.
Framer
RCLK
Rec.
Framer
263
Elast.
Store
Elast.
Store
Functional Description T1 / J1
AIS-GEN
MUX
PEB 22554
RDO
SCLKR
XDI
SCLKX
ITS09748
09.98