PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 228

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Figure 50
System Interface
System Interface Multiplex Mode
Setting this bit enables a single rail data stream of 16.384 or 8.192 or 12.352 or 6.176
MBit/s containg all four T1 frames. The receive system interface for all four channels is
running with the clock provided on SCLKR1 and the frame sync pulse provided on
SYPR1. The transmit system interface is running with SCLKX1 and SYPX1. Data will be
transmitted / accepted in a byte or bit interleaved format. Bit interleaving is valid with the
16.384 / 8.192 / 12.352 or 6.176 MHz clocking rates. However byte interleaving is only
Semiconductor Group
Receive
Data
Receive
Clock
Transmit
Data
Transmit
Clock
Attenuator
Receive
Jitter
BYP.
DCO-R
Attenuator
Signaling
Signaling
Transmit
Transmit
Transmit
Receive
Receive
Elastic
Elastic
Buffer
Buffer
Buffer
Buffer
Jitter
BYP.
228
TCLK
RCLK
PLB
Backplane
Backplane
Transmit
Receive
Functional Description T1 / J1
RSIGM
RSIG
RMFB
RFM
DLR
FREEZ
RFSPQ
XSIG
SYPXQ
XMFS
TCLK
XSIGM
XMFB
DLX
XCLK
PEB 22554
SYRPQ
ITS10298
XDI
SCLKR
DCO-R
RP(A-D)
DCO-R
RDO
SCLKX
XP(A-D)
09.98