PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 43

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PEB22554

Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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the receive clock RCLK (remote loop / loop-timed). The DCO-X attenuates the incoming
clock jitter starting at 2 Hz with 20 dB per decade fall off. With the jitter attenuated clock,
which is directly dependent on the phase difference of the incoming clock and the jitter
attenuated clock, data is read from the transmit elastic buffer (2 frames) or from the
JATT buffer (2 frames, remote loop) Wander with a jitter frequency below 2 Hz are
passed transparently.
The DCO-X accepts gapped clocks which are used in ATM or SDH/SONET applications.
The jitter attenuated clock is output by pin XCLK.
The transmit jitter attenuator could be disabled. In that case data is read from the
transmit elastic buffer with the clock sourced by pin TCLK (2.048 or 8.192 MHz).
Synchronization between SCLKX and TCLK has to done externally.
In the loop-timed clock configuration (LIM2.ELT) the DCO-X circuitry generates a
transmit clock which is frequency synchronized to RCLK. In this configuration the
transmit elastic buffer has to be enabled.
Figure 14
Transmit Clock System
Note: DR = Dual Rail Interface
Semiconductor Group
XL1/
XDOP/
XOID
XL2/
XDON
XCLK
TCLK
(E1: 8MHz)
(T1: 6MHz)
MCLK
DCO-X Digital Controlled Oscillator Transmit
DR
DR
Clocking
Unit
D
Pulse Shaper
÷ 4
A
43
E1: 8MHz
T1: 6MHz
Attenuator
Transmit
DCO-X
Jitter
Framer
Functional Description E1
Transmit
Elastic
Store
Internal Clock of
Receive System
Interface
PEB 22554
SCLKR
SCLKX
TCLK
RCLK
ITS10305
XDI
09.98

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