PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 65

• Manufacturer Part Number: PEB22554
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Transmit Transparent Modes
In transmit direction, contents of time-slot 0 frame alignment signal of the outgoing PCM
frame are normally generated by the QuadFALC. However, transparency for the
complete time-slot 0 can be achieved by selecting the transparent mode XSP.TT0. With
the Transparent Service Word Mask register TSWM the Si-bits, A-bit and the SA4-8 bits
can be selectively switched through transparently.
Enabled by
–
XSP.TT0
TSWM.TSIF
TSWM.TSIS
TSWM.TRA
TSWM.TSA4-8
1) pin XDI or XSIG or XFIFO-Buffer (signaling controller)
2)
3)
Synchronization Procedure
Synchronization status is reported via bit FRS0.LFA. Framing errors are counted by the
Framing Error Counter (FEC). Asynchronous state is reached after detecting 3 or 4
consecutive incorrect FAS words or 3 or 4 consecutive incorrect service words (bit 2 = 0
in time-slot 0 of every other frame not containing the frame alignment word), the
selection is done via bit RC1.ASY4. Additionally, the service word condition can be
disabled. When the framer lost its synchronization an interrupt status bit ISR2.LFA is
generated.
In asynchronous state, counting of framing errors and detection of remote alarm will be
stopped. AIS is automatically sent to the backplane interface (can be disabled via bit
FMR2.DAIS).
Further on the updating of the registers RSW, RSP, RSA4-8, RSA6S and RS1-16 will be
halted (remote alarm indication, Sa/Si-Bit access).
The resynchronization procedure starts automatically after reaching the asynchronous
state. Additionally, it may be invoked user controlled via bit: FMR0.FRS (Force
Resynchronization: the FAS word detection is interrupted until the framer is in the
asynchronous state. After that, resynchronization starts automatically).
Synchronous state is established after detecting:
– a correct FAS word in frame n,
– the presence of the correct service word (bit 2 = 1) in frame n + 1,
Semiconductor Group
Additionally, automatic transmission of the A-bit is selectable
As a special extension for double frame format, the Sa-bit register may be used optionally
Framing
(int. generated)
via pin XDI
(int. generated)
(int. generated)
(int. generated)
(int. generated)
Transmit Transparent Source for
1)
A Bit
XSW.XRA
via pin XDI
XSW.XRA
XSW.XRA
via pin XDI
XSW.XRA
65
2)
S
XSW.XY0 … 4
via pin XDI
XSW.XY0 … 4
XSW.XY0 … 4
XSW.XY0 … 4
via pin XDI
a
Bits
Functional Description E1
3)
S
XSW.XSIS, XSP.XSIF
via pin XDI
via pin XDI
via pin XDI
XSW.XSIS, XSP.XSIF
XSW.XSIS, XSP.XSIF
i
Bits
PEB 22554
09.98
.