PEB22554 SIEMENS [Siemens Semiconductor Group], PEB22554 Datasheet - Page 293

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PEB22554

Manufacturer Part Number
PEB22554
Description
ICs for Communications
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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Transmit Timeslot Register 1-4 (Read/Write)
Value after RESET: 00
TTR1
TTR2
TTR3
TTR4
TS0…TS31…
Semiconductor Group
7
TS16
TS24
TS0
TS8
Transmit Timeslot Register
These bits define the transmit time-slots on the system highway to be
inserted. Additionally these registers will control the XSIGM marker
which can be forced high during the respective time-slots
independently of bit CCR1.EITS.
A one in the TTR1-4 bits will insert the corresponding time-slot
sourced by the XFIFO in the data received on pin XDI, if bit
CCR1.EITS is set. If SIC3.TTRF is set and CCR1.EDLX/EITS=00,
insertion of data received on port XSIG is controlled by this registers.
Assignments:
SIC2.SSC2 = 0 : ( 32 time-slots / frame )
TS0
SIC2.SSC2 = 1 : ( 24 time-slots / frame )
TS0
0
stream.
1…The contents of the selected time-slot will be inserted in the
outgoing data stream from XFIFO. This function will only become
active, if bits CCR1.EITS is set.
The corresponding time-slot will be forced high on marker pin XSIGM.
TS17
TS25
TS1
TS9
H
, 00
The selected time-slot will not be inserted into the outgoing data
time-slot 0, . . . TS31
time-slot 0, . . . TS23
H
TS18
TS26
TS10
TS2
, 00
H
, 00
TS19
TS27
TS11
TS3
H
293
TS12
TS20
TS28
TS4
time-slot 31
time-slot 23
Operational Description T1 / J1
TS13
TS21
TS29
TS5
TS14
TS22
TS30
TS6
0
TS15
TS23
TS31
TS7
PEB 22554
(x10)
(x11)
(x12)
(x13)
09.98

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