W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 104

• Manufacturer Part Number: W7100A-64QFN
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A-64QFN

• Rohs: yes
• Interface Type: UART

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calculated as follows: (Refer to the W7100A Driver code)
case where it exceeds the TX memory of the upper-bound of the SOCKET while writing. In this
case, write the transmission data to the upper-bound, and change the physical address to the
SBUFBASEADDRESS(n). Next, write the rest of the transmission data.)
the SEND command to Sn_CR (SOCKET n Command Register). Refer to the pseudo code of the
transmission part on TCP Server mode if the detail is needed.
But this value itself is not the physical address to write. So, the physical address should be
Now, write the transmission data to dst_ptr as large as the user wants. (* There may be a
After that, be sure to increase the Sn_TX_WR value by the size of writing data. Finally, give
1. SOCKET n TX Base Address (SBUFBASEADDRESS(n)) and SOCKETn TX Mask Address
2. The bitwise-AND operation of two values and Sn_TX_WR and SMASK(n) gives the result
3. Two values dst_mask and SBUFBASEADDRESS(n) are added together to give the result of
Ex) In case of 2048(0x0800) in S0_TX_WR,
(SMASK(n)) are calculated on Sn_TXMEM_SIZE(n) value. Refer to the Pseudo code of the
Initialization if detail is needed.
of the offset address (dst_mask) in TX memory range of the SOCKET.
the physical address (dst_ptr).
0xFE4024
0x08
0xFE4025
0x00
Ver. 1.12
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