W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 62

• Manufacturer Part Number: W7100A-64QFN
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A-64QFN

• Rohs: yes
• Interface Type: UART

© Copyright 2011 WIZnet Co., Inc. All rights reserved.
6.1
and priorities can be configured by the IP register.
The UART modes are presented in the table below.
The UART baud rates are presented below.
The SMOD0 bit is located in the PCON register.
UART interrupt related bits are shown below. An interrupt can be toggled by the IE register,
SMOD0
SM0
0
0
1
1
7
Note: SMOD0 - Bit for UART baud rate
Interrupts
SM1
0
1
0
1
SMOD1
REN – ‘1’ : enable serial receive
TB8 - The 9
RB8 - In Modes 2 and 3, it is the 9
Unimplemented bit - Read as 0 or 1
Bits 2-0 must be written as 0
Mode1,3
6
Mode0
Mode2
Mode
Figure 6.3 UART Bits in Power Configuration Register
Mode
0
1
2
3
‘0’: disable serial receive
M2 is 0, RB08 is a stop bit. In Mode0, this bit is not used.
depending on the MCU’s operation (parity check, multiprocessor
communication, etc.),
5
-
th
Description
Shift register
8-bit UART
9-bit UART
9-bit UART
transmitted data bit in Modes 2 and 3. This bit is enabled
Table 6.3 UART Baud Rates
Table 6.2 UART Modes
PWE
4
Time1 overflow rate or Timer2 overflow rate
PCON (0x87)
3
-
SMOD0 = 0
SMOD0 = 1
th
bit of data received. In Mode1, if S
2
0
Baud Rate
Baud Rate
f
Variable
f
Variable
f
osc
osc
osc
/12
/32 or /64
/12
1
0
f
f
osc
osc
/64
/32
Ver. 1.12
0
0
Reset
0x00
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