W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 94

• Manufacturer Part Number: W7100A-64QFN
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A-64QFN

• Rohs: yes
• Interface Type: UART

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Value
0x40
0x23
0x24
0x25
0x26
0x27
termination, receiving data, timeout) used in SOCKET n. When an interrupt occurs and the
mask bit of Sn_IMR is ‘1’, the interrupt bit of Sn_IR becomes ‘1’.
Sn_IR is cleared (‘0’), IR(n) is automatically cleared. It occurs the INT5 signal (nINT5:
TCPIPCore interrupt) to MCU.
Below commands are only valid for SOCKET 0 and S0_MR(P3:P0) = S0_MR_PPPoE.
For more detail refer to the W5100 application note “How to use ADSL”.
Sn_IR (SOCKET n Interrupt Register)[R/W][0xFE4002 + 0x100n][0x00]
Sn_IR register provides information such as the type of interrupt (establishment,
In order to clear the Sn_IR bit, the host should write the bit as ‘1’. When all the bits of
Bit
PRECV
7
6
5
4
7
PDISCON
SENDOK
Symbol
Symbol
PRECV
PNEXT
PFAIL
PCON
RECV
PCR
PCN
PCJ
PFAIL
6
PPP Receive Interrupt, when the option which is not supported is
received
PPP Fail Interrupt, when PAP Authentication is failed
PPP Next Phase Interrupt, when the phase is changed during ADSL
connection process
SEND OK Interrupt, when the SEND command is completed
It checks the connection status by sending the keep alive packet. If the
connection has no response from peers or is terminated, the Timeout
interrupt will occur.
RECV processes the data received by using a RX read pointer
register(Sn_RX_RD).
For more detail, please refer to 9.2.1.1 SERVER mode Receiving Process
with SOCKET n RX Received Size Register (Sn_RX_RSR), SOCKET n RX
Write Pointer Register(Sn_RX_WR), and SOCKET n RX Read Pointer
Register(Sn_RX_RD).
ADSL connection begins by transmitting PPPoE Discovery Packet
Closes ADSL connection
In each phase, it transmits REQ message
In each phase, it transmits NAK message
In each phase, it transmits REJECT message
PNEXT
5
SEND_OK
4
TIMEOUT
Description
3
Description
RECV
2
DISCON
Ver. 1.12
1
CON
0
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