W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 75

• Manufacturer Part Number: W7100A-64QFN
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A-64QFN

• Rohs: yes
• Interface Type: UART

© Copyright 2011 WIZnet Co., Inc. All rights reserved.
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0xFE4111
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~
~
S1_RXMEM_SIZE
S1_TXMEM_SIZE
S1_RX_RSR0
S1_RX_RSR1
S1_TX_FSR0
S1_TX_FSR1
S1_TX_WR0
S1_TX_WR1
S1_RX_WR0
S1_RX_WR1
S1_DPORT0
S1_DPORT1
S1_TX_RD0
S1_TX_RD1
S1_RX_RD0
S1_RX_RD1
S1_PROTO
S1_FRAG0
S1_FRAG1
S1_MSSR0
S1_MSSR1
S1_DIPR2
S1_DIPR3
S1_TOS
S1_TTL
S1_IMR
S2_MR
S2_CR
S2_IR
SOCKET 1 Receive Memory Size Register
SOCKET 1 Transmit Memory Size Register
SOCKET 1 Interrupt Mask Register
SOCKET 2 Mode Register
SOCKET 2 Command Register
SOCKET 2 Interrupt Register
S1_DPORT (SOCKET 1 Destination Port Register)
S1_MSSR (SOCKET 1 Maximum Segment Size Register)
SOCKET 1 Protocol of IP Header Field Register in IP raw
mode
SOCKET 1 IP Type of Service(TOS) Register
SOCKET 1 IP Time to Live(TTL) Register
Reserved
S1_TX_FSR (SOCKET 1 Transmit Free Memory Size Register)
S1_TX_RD
(SOCKET 1 Transmit Memory Read Pointer Register)
S1_TX_WR
(SOCKET 1 Transmit Memory Write Pointer Register)
S1_RX_RSR
(SOCKET 1 Received Data Size Register)
S1_RX_RD
(SOCKET 1 Receive Memory Read Pointer Register)
S1_RX_WR (SOCKET 1 Receive Memory Write Pointer
Register)
S1_FRAG
(SOCKET 1 Fragment Field Value in IP Header Register)
Reserved
Ver. 1.12
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