W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 59

• Manufacturer Part Number: W7100A-64QFN
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A-64QFN

• Rohs: yes
• Interface Type: UART

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result by hardware. That is, interrupts can be generated or cancelled by software.
All of the bits that generate interrupts can be set or cleared by software, with the same
TF2
7
7
-
Note: EA - Enable global interrupts
Note: PT2 - Timer2 interrupt priority level control (high level at 1)
Note: TF2 – Timer2 interrupt (overflow) flag. It must be cleared by software. T
Figure 5.18 Timer/Counter2, 16-Bit Timer/Counter with Capture Mode
EXF2
ET2 - Enable Timer2 interrupts
Unimplemented bit - Read as 0 or 1
6
-
6
Figure 5.17 Timer2 Configuration Register — TF2
his flag will not be set when either RCLK or TCLK is set.
Figure 5.16 Interrupt Priority Register — Timer2
RCLK
PT2
5
5
TCLK
PS
4
4
T2CON (0xC8)
IP (0xB8)
EXEN2
PT1
3
3
PX1
TR2
2
2
PT0
CT2
1
1
CPRL2
PX0
Ver. 1.12
0
0
Reset
Reset
0x00
0x00
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