W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 67

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W7100A-64QFN

Manufacturer Part Number
W7100A-64QFN
Description
8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
Manufacturer
WIZnet
Datasheet

Specifications of W7100A-64QFN

Rohs
yes
Interface Type
UART

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© Copyright 2011 WIZnet Co., Inc. All rights reserved.
result by hardware. That is, interrupts can be generated or cancelled by software.
7.3
system restarts the Watchdog first by using RWT. Then, the reset mode is enabled by the EWT
(Enable Watchdog Timer reset = WDCON.1) bit. Before the timer reaches the user selected
terminal value, the software can set the RWT (Reset Watchdog Timer = WDCON.0) bit. If RWT
is set before the timeout is reached, the timer will start over. If the timeout is reached
without RWT being set, the Watchdog will reset the MCU. The Hardware automatically clears
RWT after sets the RWT by software. When a reset occurs, the WTRF (Watchdog Timer reset
Flag = WDCON.2) will automatically set to indicate the cause of the reset; however, software
must clear this bit manually.
Interrupt Flag
All of the bits that generate interrupts can be set or cleared by software, with the same
The Watchdog Timer reset operates as follows. Once the timeout interval is initialized, the
WDIF
7
-
7
-
Note: PWDI - Watchdog priority level control (high level at 1)
Note: WDIF - Watchdog Interrupt Flag. WDIF in conjunction with Enable Watchd
Watchdog Timer Reset
Unimplemented bit - Read as 0 or 1
6
-
6
-
Watchdog
Function
Internal,
Figure 7.4 Extended interrupt Priority Register
og Interrupt bit (EIE.4) and EWT, indicates if a watchdog timer e
vent has occurred and what action should be taken. This bit mu
st be cleared by software before exiting the interrupt service ro
utine or another interrupt is generated. Setting WDIF in software
will generate a watchdog interrupt if enabled. User must use ‘Ti
med Access Register’ when clear this WDIF bit. Please refer to
the section 7.8 ‘Timed Access’ procedure.
5
-
5
-
Figure 7.5 Watchdog Control Register
Table 7.1 Watchdog Interrupt
PWDI
Active Level/Edge
4
4
-
WDCON (0xD8)
EIP (0xF8)
PINT5
WDIF
-
3
3
PINT4
WTRF
2
2
Flag Reset
Software
PINT3
EWT
1
1
Vector
0x63
PINT2
RWT
Ver. 1.12
0
0
Natural Priority
Reset
Reset
0x00
0x00
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