W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 65

• Manufacturer Part Number: W7100A-64QFN
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A-64QFN

• Rohs: yes
• Interface Type: UART

© Copyright 2011 WIZnet Co., Inc. All rights reserved.
6.5
reception is enabled when REN = 1. The baud rate is variable and dependent on Timer 1 or
Timer 2 mode. To enable Timer 2 clocking, set the TCLK and RCLK bits which are located in
the T2CON (0xC8) register.
6.6
Baud Rate(bps)
Note: Baud Rate calculation formula
The only difference between Mode2 and Mode3 is the baud rate in Mode3 is variable. Data
Clock Source
115200
230400
14400
19200
28800
38400
57600
Using Timer1 – Baud Rate = ( 2
Using Timer2 – Baud Rate = Clock Frequency / ( 32 * ( 65536 – ( RLDH, RLDL ) ) )
2400
4800
9600
Mode3, 9-Bit UART, Variable Baud Rate, Timer1 or 2
Examples of Baud Rate Setting
Figure 6.10 Timing Diagram for UART Transmission Mode3
SMOD = ‘0’
160(0xA0)
208(0xD0)
252(0xFC)
232(0xE8)
240(0xF0)
244(0xF4)
248(0xF8)
250(0xFA)
254(0xFE)
255(0xFF)
Table 6.5 Examples of Baud Rate Setting
Timer 1 / Mode2
TH1(0x8D)
SMOD
/ 32 ) * ( Clock Frequency / 12( 256 – TH1 ) )
SMOD = ‘1’
160(0xA0)
208(0xD0)
252(0xFC)
224(0xE0)
232(0xE8)
240(0xF0)
244(0xF4)
248(0xF8)
254(0xFE)
64(0x40)
RLDH(0xCB), RLDL(0xCA)
64960(0xFDC0)
64384(0XFB80)
65248(0xFEE0)
65344(0XFF40)
65392(0XFF70)
65464(0XFFB8)
65488(0xFFD0)
65440(0xFFA0)
65512(0xFFE8)
65524(0xFFF4)
Timer 2
Ver. 1.12
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