W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 32

• Manufacturer Part Number: W7100A-64QFN
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A-64QFN

• Rohs: yes
• Interface Type: UART

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2.4
addressable segment with 128 bits (16 bytes) that begins at 0x20, and a scratchpad area with
208 bytes is embedded. With indirect addressing mode ranging from 0x80 to 0xFF, the highest
128 bytes is accessed as an internal memory. But with direct addressing mode ranging from
0x80 to 0xFF, this area is accessed as a SFR memory.
The Figure below shows the Internal Memory and Special Function Registers (SFR) map.
The lower internal RAM consists of four register banks with eight registers each, a bit-
All of the SFR in the left hand side column ending with 0 or 8 are bit addressable.
New SFR – New additional SFR, described in this section
Extended SFR
Standard – standard 8051 SFR, described in this section
Internal Data Memory and SFR
– Extended from standard 8051, described in this section
Figure 2.10 Internal Memory Map
Figure 2.11 SFR Memory Map
Ver. 1.12
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