W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 111

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W7100A-64QFN

Manufacturer Part Number
W7100A-64QFN
Description
8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
Manufacturer
WIZnet
Datasheet

Specifications of W7100A-64QFN

Rohs
yes
Interface Type
UART

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© Copyright 2011 WIZnet Co., Inc. All rights reserved.
2. Set the retransmission time & count when the packet transmission fails.
 STEP 3 : Allocation Internal TX/RX Memory for SOCKET n
In case of, assign 2KB rx, tx memory per SOCKET
{
gS0_RX_BASE = 0xFE0000(Chip base address) + 0xFEC000(Internal RX buffer address);
base address of RX memory for SOCKET 0
Sn_RXMEM_SIZE(ch) = (uint8 *) 2;
gS0_RX_MASK = 2K – 1;
memory
gS1_RX_BASE = gS0_RX_BASE + (gS0_RX_MASK + 1);
gS1_RX_MASK = 2K – 1;
gS2_RX_BASE = gS1_RX_BASE + (gS1_RX_MASK + 1);
gS2_RX_MASK = 2K – 1;
gS3_RX_BASE = gS2_RX_BASE + (gS2_RX_MASK + 1);
gS3_RX_MASK = 2K – 1;
gS4_RX_BASE = gS3_RX_BASE + (gS3_RX_MASK + 1);
gS4_RX_MASK = 2K – 1;
gS5_RX_BASE = gS4_RX_BASE + (gS4_RX_MASK + 1);
gS5_RX_MASK = 2K – 1;
gS6_RX_BASE = gS5_RX_BASE + (gS5_RX_MASK + 1);
gS6_RX_MASK = 2K – 1;
gS7_RX_BASE = gS6_RX_BASE + (gS6_RX_MASK + 1);
gS7_RX_MASK = 2K – 1;
gS0_TX_BASE = 0xFE0000(Chip base address) + 0xFE8000(Internal TX buffer address);
base address of TX memory for SOCKET 0
Sn_TXMEM_SIZE(ch) = (uint8 *) 2;
gS0_TX_MASK = 2K – 1;
Same method, set gS1_TX_BASE, gS1_TX_MASK, gS2_TX_BASE, gS2_TX_MASK, gS3_TX_BASE,
gS3_TX_MASK, gS4_TX_BASE, gS4_TX_MASK, gS5_TX_BASE, gS5_TX_MASK, gS6_TX_BASE,
gS6_tx_MASK, gS7_TX_BASE, gS7_TX_MASK.
}
To set the retransmission time, the registers should be set as below.
Total configurable maximum size of TX, RX memory is 16 Kbytes. User can freely set the
memory size to 1KB, 2KB, 4KB, 8KB and 16KB within 16Kbytes each 8 sockets. But the
sum of TX or RX memory cannot be set more than 16Kbytes. (TX
① RTR(Retry Time-value Register), In the RTR, ‘1’ means ‘100us’.
② RCR(Retry Count Register)
// 0x07FF, for getting offset address within assigned SOCKET 0 RX
// Assign 2K rx memory per SOCKET
// Assign 2K rx memory per SOCKET
max
= 16KB, RX
Ver. 1.12
max
= 16KB)
// Set
// Set
111

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