W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 41

• Manufacturer Part Number: W7100A-64QFN
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A-64QFN

• Rohs: yes
• Interface Type: UART

© Copyright 2011 WIZnet Co., Inc. All rights reserved.
2.5.11 Peripheral Registers
P0, P1, P2, P3 : Port register. For detail information, please refer to the section 4 ‘I/O
TCON(0x88) : Timer0, 1 configuration register. For detail information, please refer to the
TMOD(0x89) : Timer0, 1 control mode register. For detail information, please refer to the
TH0(0x8C), TL0(0x8A) : Counter register of timer 0. For detail information, please refer to
TH1(0x8D), TL1(0x8B) : Counter register of timer 1. For detail information, please refer to
SBUF(0x99) : UART Buffer Register. For detail information, please refer to the section 6
SCON(0x98) : UART Configuration Register. For detail information, please refer to the
CLKCNT0(0xDD): W7100A core clock count register bit8 ~ 15.
CLKCNT0(0xDE): W7100A core clock count register bit16 ~ 23.
CLKCNT0(0xDF): W7100A core clock count register bit24 ~ 31.
Bit15
Bit23
Bit31
7
7
7
his SFR is used for counting core clock or measuring time or clock.
ex> 1 second = about 88000000 clock count (core clock is about 88MHz)
Bit14
Bit22
Bit30
6
6
6
section 6 ‘UART’ for the Functionality of UART.
section 5.1 ‘Timer 0, 1’ for the Functionality of Timer0 and Timer 1.
section 5.1 ‘Timer 0, 1’ for the Functionality of Timer0 and Timer 1.
Ports’ for the Functionality of I/O Ports.
Bit13
Bit21
Bit29
5
5
5
the section 5.1 ‘Timer 0, 1’ for the Functionality of Timer0 and
Timer 1.
the section 5.1 ‘Timer 0, 1’ for the Functionality of Timer0 and
Timer 1.
Figure 2.33 Core clock count register
Figure 2.34 Core clock count register
Figure 2.35 Core clock count register
Bit12
Bit20
Bit28
4
4
4
CLK_CNT1 (0xDD)
CLK_CNT2 (0xDE)
CLK_CNT3 (0xDF)
Bit11
Bit19
Bit27
3
3
3
Bit10
Bit18
Bit26
2
2
2
Bit17
Bit25
Bit9
1
1
1
Ver. 1.12
Bit16
Bit24
Bit8
0
0
0
Reset
Reset
Reset
0x00
0x00
0x00
41