W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 152

• Manufacturer Part Number: W7100A-64QFN
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A-64QFN

• Rohs: yes
• Interface Type: UART

© Copyright 2011 WIZnet Co., Inc. All rights reserved.
13.4 32-bit Arithmetic Functions
13.4.1 Addition
registers RaRbRcRd. The second operand is located in four registers RvRxRyRz.
ADDC
ADDC
ADDC
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MUL
XCH
MUL
ADD
XCH
MUL
ADD
ADD
The following code performs 32-bit addition. The first operand and result are located in four
RaRbRcRd = RaRbRcRd + RvRxRyRz
Mnemonic
A, Rb
B, Rx
A, Rz
A, Ra
A, Ra
A, Rd
A, Rz
Rd, A
A, Rc
A, Ry
A, Rb
A, Rx
Rb, A
A, Ra
A, Rv
B, Ry
Rz, B
B, Ry
Ra, A
Rc, A
Ra, A
AB
AB
AB
Sum :
Sum :
A8h – AFh
C8h – CFh
C8h – CFh
88h – 8Fh
88h – 8Fh
28h - 2Fh
88h – 8Fh
28h – 2Fh
F8h – FFh
E8h – EFh
28h – 2Fh
F8h – FFh
E8h – EFh
38h – 3Fh
F8h – FFh
E8h – EFh
38h – 3Fh
F8h – FFh
E8h – EFh
38h – 3Fh
F8h – FFh
Opcode
A4h
A4h
A4h
Byte
2
1
2
1
2
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
80C51 Cycle
312
144
24
48
24
12
24
48
12
12
24
48
12
12
12
12
12
12
12
12
12
12
12
12
12
12
wizmemcpy
ISP /
23
12
2
2
3
2
2
2
1
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
W7100A Cycle
Ver. 1.12
user code
FLASH /
52
48
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
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