W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 30

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W7100A-64QFN

Manufacturer Part Number
W7100A-64QFN
Description
8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
Manufacturer
WIZnet
Datasheet

Specifications of W7100A-64QFN

Rohs
yes
Interface Type
UART

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© Copyright 2011 WIZnet Co., Inc. All rights reserved.
2.3.1 Standard 8051 Interface
address is changed refer to the setting of EM[2:0] (External Memory Mode) which spaced
WCONF(0xFF) of SFR register. When user sets the EM[2:0] to “001”, the port0 is used as
address/data bus and the port2 is used as upper side address (A[15:8]). The port1 and port3 is
used as GPIO. It is shown the figure below.
address/data bus and the port2 is used as upper side address (A[15:8]). But, since the port3 is
used as topside address (A[23:16]), the range of accessible address is expanded. The
remained port1 is used as GPIO. It is shown the figure below.
This method is same as external interface of general 8051. But the range of accessible
When user sets the EM[2:0] to “011”, as in the previous case, the port0 is used as
Figure 2.7 Standard 8051 External Pin Access Mode (EM[2:0] = “011”)
Figure 2.6 Standard 8051 External Pin Access Mode (EM[2:0] = “001”)
EM[2:0]=001
WCONF
(0xFF)
W7100A
P0[7:0]
P1[7:0]
P2[7:0]
P3[7:0]
ALE
AD[7:0]
A[15:8]
GPIO
GPIO
Latch
D[7:0]
A[15:0]
External
Device
Ver. 1.12
30

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