W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 58

• Manufacturer Part Number: W7100A-64QFN
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A-64QFN

• Rohs: yes
• Interface Type: UART

© Copyright 2011 WIZnet Co., Inc. All rights reserved.
5.2.2 Interrupts
and priorities can be configured by the IP register.
The interrupt bits for Timer2 are shown below. An interrupt can be toggled by the IE register,
EA
7
Figure 5.14 Timer/Counter2, 16-Bit Timer/Counter with Auto-Reload
EXEN2 - Enable T2EX pin functionality
CPRL2 - Capture/Reload select
TR2 - Start/Stop Timer2
CT2 - Timer/Counter select
6
-
0: Stop
1: Start
0: Internally clocked timer
1: External event counter. Clock source is T2 pin
0: Automatic reload occurs when Timer2 overflow or falling edge of
1: On the falling edge of T2EX pin, capture is activated when EXEN
Figure 5.15 Interrupt Enable Register — Timer2
1: UART transmitter is clocked by Timer2 overflow pulses
0: Ignore T2EX events
1: Allow capture or reload as a result of T2EX pin falling edge
ET2
2=1.
5
the T2EX pin with EXEN2=1. When RCLK or TCLK is set, this bit
is ignored and automatic reload when Timer2 overflows.
ES
4
IE (0xA8)
ET1
3
EX1
2
ET0
1
EX0
Ver. 1.12
0
Reset
0x00
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