W7100A-64QFN WIZnet, W7100A-64QFN Datasheet - Page 46

• Manufacturer Part Number: W7100A-64QFN
• Description: 8-bit Microcontrollers - MCU 8051 CORE+HARDWIRED TCP/IP+MAC+PHY
• Manufacturer: WIZnet

Specifications of W7100A-64QFN

• Rohs: yes
• Interface Type: UART

© Copyright 2011 WIZnet Co., Inc. All rights reserved.
7
7
-
-
Note: INT2F - INT2 interrupt flag. Must be cleared by software
Note: WDIF - Watchdog Interrupt Flag. WDIF in conjunction with the Enable Wat
INT3F – INT3 interrupt flag. Must be cleared by software
INT4F – Must be set to ‘0’. if use the EIF register
INT5F - TCPIPCore Interrupt flag. Must be cleared by software
6
6
-
-
chdog Interrupt bit (EIE.4) and EWT provides information such as
whether the Watchdog Timer event has been encountered or not
and what action should be taken. This bit must be cleared by sof
tware before exiting the interrupt service routine. By using softwa
re to enable the WDIF, a Watchdog interrupt is generated. Enable
d software-set WDIF will generate a Watchdog interrupt. Timed Ac
cess Register procedure can be used to modify this bit.
Figure 3.7 Extended Interrupt Flag Register
5
-
5
-
Figure 3.8 Watchdog Control Register
4
-
4
-
WDCON (0xD8)
EIF (0x91)
INT5F
WDIF
3
3
INT4F
WTRF
2
2
INT3F
EWT
1
1
INT2F
RWT
Ver. 1.12
0
0
Reset
Reset
0x00
0x00
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