DO-CPLD-DK-G Xilinx Inc, DO-CPLD-DK-G Datasheet - Page 115

• Manufacturer Part Number: DO-CPLD-DK-G
• Description: KIT DESIGN CPLD W/BATT HOLDER
• Manufacturer: Xilinx Inc
• Series: CoolRunner™- IIr
• Type: CPLDr

Specifications of DO-CPLD-DK-G

• Contents: Proto Board, Download Cable, Samples, Software
• For Use With/related Products: CoolRunner-ll, XC9500XL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1512

Synthesis
Programmable Logic Design
June 12, 2006
R
The project originally targeted at a CoolRunner-II CPLD, and is now targeting a Xilinx
Spartan-3 FPGA. The green ticks in the Process window should have disappeared and
been replaced by orange question marks, indicating that the design must be re-synthesized
and re-implemented.
The XST synthesis tool will only attempt to synthesize the file highlighted in the Source
window. In our traffic light design, “top.vhd” (for VHDL designs) or “top_sch” (for
schematic designs) instantiates two lower level blocks, “stat_mac” and “counter.” The
synthesis tool recognizes all the lower level blocks used in the top-level code and
synthesizes them together to create a single netlist. The synthesis tool will never alter the
function of the design, but it has a huge influence on how the design will perform in the
targeted device.
1.
2.
Note:
syntax errors. (It is useful, when writing code, to periodically check your design for any mistakes using
this feature.)
g. Set Simulator to ISE Simulator (VHDL/Verilog)
h. Click on OK.
In the Sources window, ensure that “top.vhd” (or “top_sch” for schematic flows) is
highlighted.
In the Process window, expand the Synthesis subsection by clicking on the plus
sign (+) next to Synthesize. You can now check your design by double-clicking on
Check Syntax.
Ensure that any errors in your code are corrected before you continue. If the syntax
check is OK, a green check mark will appear (as shown in
Figure 6-3: Processes Window Showing Check Syntax has Completed
The design should be okay because both the Bencher and XSim have already checked for
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Successfully
Figure
6-3).
Synthesis
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