DO-CPLD-DK-G Xilinx Inc, DO-CPLD-DK-G Datasheet - Page 36

• Manufacturer Part Number: DO-CPLD-DK-G
• Description: KIT DESIGN CPLD W/BATT HOLDER
• Manufacturer: Xilinx Inc
• Series: CoolRunner™- IIr
• Type: CPLDr

Specifications of DO-CPLD-DK-G

• Contents: Proto Board, Download Cable, Samples, Software
• For Use With/related Products: CoolRunner-ll, XC9500XL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1512

Chapter 2: Xilinx Silicon Solutions
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Table 2-3: XCITE DCI Technology Advantages
• Second Generation Technology
• Lower Costs
• Absolute I/O Flexibility
• Maximum I/O Bandwidth
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DCMs deliver sophisticated digital clock management that’s impervious to system
jitter, temperature, voltage variations, and other problems typically found with PLLs
integrated into FPGAs.
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XCITE Digitally Controlled Impedance Technology – A Xilinx Innovation
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Spartan-3 XCITE DCI Technology Highlights
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As many as 104 18 x 18 multipliers support 18-bit signed or 17-bit unsigned
multiplication, which you can cascade to support wider bits
Constant coefficient multipliers: On-chip memories and logic cells work hand-in-
hand to build compact multipliers with a constant operand
Logic Cell multipliers: Implement user-preferred algorithms such as Baugh-
Wooley, Booth, Wallace tree, and others
Flexible frequency generation from 25 MHz to 325 MHz
100 ps jitter
Integer multiplication and division parameters
Quadrature and precision phase shift control
0, 90, 180, 270 degrees
Fine grain control (1/256 clock period) for clock data synchronization
Precise 50/50 duty cycle generation
Temperature compensation
I/O termination is required to maintain signal integrity. With hundreds of I/Os
and advanced package technologies, external termination resistors are no longer
viable.
I/O termination dynamically eliminates drive strength variation due to process,
temperature, and voltage fluctuations.
Series and parallel termination for single-ended and differential standards
Maximum flexibility with support of series and parallel termination on all I/O
banks
Input, output, bidirectional, and differential I/O support
Wide series impedance range
Popular standard support, including LVDS, LVDSEXT, LVCMOS, LVTTL, SSTL,
HSTL, GTL, and GTLP
Full- and half-impedance input buffers
Advantage
www.xilinx.com
Proven in the field and used extensively by
customers
Fewer resistors, fewer PCB traces, and smaller
board area, result in lower PCB costs.
Any termination on any I/O bank. Non- XCITE
technology alternatives deliver limited
functionality
Less ringing and reflections maximize I/O
bandwidth
Details
Programmable Logic Design
June 12, 2006
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