DO-CPLD-DK-G Xilinx Inc, DO-CPLD-DK-G Datasheet - Page 13

• Manufacturer Part Number: DO-CPLD-DK-G
• Description: KIT DESIGN CPLD W/BATT HOLDER
• Manufacturer: Xilinx Inc
• Series: CoolRunner™- IIr
• Type: CPLDr

Specifications of DO-CPLD-DK-G

• Contents: Proto Board, Download Cable, Samples, Software
• For Use With/related Products: CoolRunner-ll, XC9500XL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1512

Complex Programmable Logic Devices (CPLDs)
Programmable Logic Design
June 12, 2006
Why Use a CPLD?
R
PLDs provide the ability to program the devices time and time again, electrically
programming and erasing the device. Gone are the days of erasing for more than 20
minutes under an UV eraser.
Complex programmable logic devices (CPLDs) extend the density of SPLDs. The concept
is to have a few PLD blocks or macrocells on a single device with a general-purpose
interconnect in-between. Simple logic paths can be implemented within a single block.
More sophisticated logic requires multiple blocks and uses the general-purpose
interconnect in-between to make these connections. CPLDs feature:
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•
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CPLDs are great at handling wide and complex gating at blistering speeds – 5
nanoseconds, for example, which is equivalent to 200 MHz. The timing model for CPLDs is
easy to calculate so before starting your design you can calculate your input-to-output
speeds.
CPLDs enable ease of design, lower development costs, more product revenue for your
money, and the opportunity to speed your products to market.
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Central global interconnect
Simple, deterministic timing
Easily routed
PLD tools add only interconnect
Wide, fast complex gating
Ease of Design: CPLDs offer the simplest way to implement a design. Once a design
has been described, by schematic and/or HDL entry, you simply use CPLD
development tools to optimize, fit, and simulate the design. The development tools
create a file that is used to customize (that is, program) a standard off-the-shelf CPLD
with the desired functionality. This provides an instant hardware prototype and
allows the debugging process to begin. If modifications are needed, you can enter
I/O
I/O
SPLD Block
SPLD Block
MC15
MC15
MC15
MC1
MC1
MC1
MC0
MC0
MC0
PAL
PAL
PLA
PLA
www.xilinx.com
or
or
Figure 1-3: CPLD Architecture
Complex Programmable Logic Devices (CPLDs)
CPLD
CPLD
Interconnect
Interconnect
Array
Array
PAL
PAL
PLA
PLA
or
or
SPLD Block
SPLD Block
MC15
MC15
MC15
MC0
MC0
MC0
MC1
MC1
MC1
I/O
I/O
3