DO-CPLD-DK-G Xilinx Inc, DO-CPLD-DK-G Datasheet - Page 40

• Manufacturer Part Number: DO-CPLD-DK-G
• Description: KIT DESIGN CPLD W/BATT HOLDER
• Manufacturer: Xilinx Inc
• Series: CoolRunner™- IIr
• Type: CPLDr

Specifications of DO-CPLD-DK-G

• Contents: Proto Board, Download Cable, Samples, Software
• For Use With/related Products: CoolRunner-ll, XC9500XL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1512

Chapter 2: Xilinx Silicon Solutions
30
Inside the Virtex-4
At the heart of the Virtex-4 FPGA is Xilinx’ next generation 90nm triple oxide 10-layer
copper CMOS process technology. With a dual oxide 90nm process, there would have been
a trade off between performance and power. With triple oxide, that is not the case, both
high performance and low power are achievable.
The columnar approach to building the ASMBL architecture enables Xilinx to cost-
effectively develop multiple FPGA platforms, each with different combinations of feature
sets. Thus, a specific platform can be optimized specifically for a certain domain of
applications – such as logic, connectivity, DSP and embedded processing – to meet
application requirements previously delivered only by ASICs, ASSPs and similar devices
while remaining programmable at heart.
Traditional FPGA Family
Traditional FPGA Family
Figure 2-19: Xilinx ASMBL Architecture
www.xilinx.com
Feature
Feature
Feature
Feature
Feature
Feature
Feature
Feature
D
D
C
C
B
B
A
A
Feature
Feature
Multi-platform FPGA Family
Multi-platform FPGA Family
A
A
Programmable Logic Design
Virtex-4
Virtex-4
June 12, 2006
Feature
Feature
B
B
R