DO-CPLD-DK-G Xilinx Inc, DO-CPLD-DK-G Datasheet - Page 117

• Manufacturer Part Number: DO-CPLD-DK-G
• Description: KIT DESIGN CPLD W/BATT HOLDER
• Manufacturer: Xilinx Inc
• Series: CoolRunner™- IIr
• Type: CPLDr

Specifications of DO-CPLD-DK-G

• Contents: Proto Board, Download Cable, Samples, Software
• For Use With/related Products: CoolRunner-ll, XC9500XL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1512

The Constraints File
Programmable Logic Design
June 12, 2006
R
When synthesis chooses to use primitive macros it is known as “inference.” As registered
outputs were selected in the state machine, three further registers were inferred.
The Final Report section shows the resources used within the FPGA.
To get the ultimate performance from the device, you must tell the implementation tools
what and where performance is required. This design is particularly slow and timing
constraints are unnecessary. Constraints can also be physical; pin locking is a physical
Figure 6-5: Extract of Synthesis Report
www.xilinx.com
Figure 6-6: Final Report
The Constraints File
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