DO-CPLD-DK-G Xilinx Inc, DO-CPLD-DK-G Datasheet - Page 72

KIT DESIGN CPLD W/BATT HOLDER

DO-CPLD-DK-G

Manufacturer Part Number
DO-CPLD-DK-G
Description
KIT DESIGN CPLD W/BATT HOLDER
Manufacturer
Xilinx Inc
Series
CoolRunner™- IIr
Type
CPLDr
Datasheets

Specifications of DO-CPLD-DK-G

Contents
Proto Board, Download Cable, Samples, Software
For Use With/related Products
CoolRunner-ll, XC9500XL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1512

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Chapter 4: WebPACK ISE Design Entry
62
10. Check that the Counter source is still highlighted and with the Processes tab selected,
11. The simulation is automatically compiled by the ISE WebPACK software and when it
12. The behavior of this circuit is as we expected. It increments the count signal by one on
double click Simulate Behavioral Model in the Process window (you may need
to click the plus sign next to Xilinx ISE Simulator).
is complete, the ISE Simulator Waveform window opens showing the result of the
simulation. Click on the plus sign next to the COUNT bus so that it is possible to see all
four signals that make up the bus individually.
every rising edge of the clock. So, as this section works, we can continue to build our
design. First we will take a snapshot so that we can refer back to this stage in the design
Figure 4-14: Behavioral Simulation Results
Figure 4-13: Simulate Behavioral Model
www.xilinx.com
Programmable Logic Design
June 12, 2006
R

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