DO-CPLD-DK-G Xilinx Inc, DO-CPLD-DK-G Datasheet - Page 45

KIT DESIGN CPLD W/BATT HOLDER

DO-CPLD-DK-G

Manufacturer Part Number
DO-CPLD-DK-G
Description
KIT DESIGN CPLD W/BATT HOLDER
Manufacturer
Xilinx Inc
Series
CoolRunner™- IIr
Type
CPLDr
Datasheets

Specifications of DO-CPLD-DK-G

Contents
Proto Board, Download Cable, Samples, Software
For Use With/related Products
CoolRunner-ll, XC9500XL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1512

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DO-CPLD-DK-G
Manufacturer:
XILINX
0
Military and Aerospace
Automotive and Industrial
Programmable Logic Design
June 12, 2006
Xilinx XA Solutions – Architecting Automotive Intelligence
R
CLB Resources
Memory Resources
Clock Resources
I/O Resources
DSP Resources
Table 2-7: Virtex-5 LX Selection Guide
Xilinx is the leading supplier of high-reliability PLDs to the aerospace and defense
markets. These devices are used in a wide range of applications such as electronic warfare,
missile guidance and targeting, RADAR, SONAR communications, signal processing,
avionics, and satellites. The Xilinx QPro family of ceramic and plastic QML products
provides you with advanced programmable logic solutions for next-generation designs.
The QPro family also includes select products that are radiation hardened for use in
satellite and other space applications. Our quality management system is fully compliant
with all ISO9001 requirements. In 1997, Xilinx became fully qualified as a QML supplier by
meeting all of the requirements for MIL Standard 38535.
In-car electronic content is increasing at a phenomenal rate. It includes such applications as
navigation systems, entertainment systems, instrument clusters, advanced driver
Notes:
EasyPath
Package
Block RAM/FIFO w/ECC (36kbits each)
FF1153
FF1760
FF324
FF676
Maximum Distributed RAM (kbits)
Digitally Controlled Impedance
Maximum Differential I/O Pairs
CLB Array Size (Row x Column)
Configuration Memory (Mbits)
(4)
Cost Reduction Solutions
1. Xilinx EasyPath
2. A single Virtex-5 CLB comprises two slices, with each containing four 6-input LUTs and four Flip-Flops (twice the number found
3. Virtex-5 logic cell ratings reflect the increased logic capacity offered by the new 6-input LUT architecture.
4. FFA Packages (FF): flip-chip fine-pitch BGA (1.00 mm ball spacing).
5. Virtex-5 commercial grade devices come in three speed grades: -1, -2,-3 (-3 being the fastest).
6. Virtex-5 industrial grade devices come in two speed grades: -1,-2 (-2 being the fastest).
Phase Locked Loop/PMCD
Maximum SelectIO
in a Virtex-4 slice), for a total of eight 6-LUTs and eight Flip-Flops per CLB.
42.5 x 42.5 mm
Total Block RAM (kbits)
19 x 19 mm
27 x 27 mm
35 x 35 mm
Digital Clock Manager
Area
SelectIO
CLB Flip-Flops
DSP48E Slices
www.xilinx.com
I/O Standards
Logic Cells
Part Number
FPGA solutions provide a conversion-free cost-reduction path for volume production
Slices
Banks
1200
220
440
800
Pins
I/O
(1)
(2)
(3)
XC5VLX30
Virtex-5 LX
HT, LVDS, LVDSEXT, RSDS, BLVDS, ULVDS, LVPECL, LVCMOS33, LVCMOS25, LVCMOS18, LVCMOS15,
LVTTL, PCI33, PCI66, PCI-X, GTL, GTL+, HSTL I (1.2V,1.5V,1.8V), HSTL II (1.5V,1.8V), HSTL III
(1.5V,1.8V), HSTL IV (1.5V,1.8V), SSTL2 I, SSTL2 II, SSTL18 I, SSTL18 II
LX30
80 x 30
30,720
19,200
4,800
1,152
320
400
200
220
400
Yes
8.4
32
13
32
4
2
XC5VLX50
120 x 30
LX50
46,080
28,800
7,200
1,728
12.6
480
560
Yes
280
220
440
560
48
12
17
48
6
XC5VLX85 XC5VLX110 XC5VLX220 XC5VLX330
XCE5VLX85
120 x 54
LX85
12,960
82,944
51,840
3,456
21.8
840
560
280
440
560
Yes
96
12
17
48
6
XCE5VLX110
LX110
160 x 54
110,592
17,280
69,120
1,120
4,608
29.1
128
800
Yes
400
440
800
800
12
23
64
6
Military and Aerospace
XCE5VLX220
LX220
160 x 108
221,184
138,240
34,560
2,280
6,912
53.1
192
800
Yes
400
128
800
12
23
6
XCE5VLX330
LX330
240 x 108
331,776
207,360
51,840
10,368
3,420
1,200
1200
79.7
288
Yes
600
192
12
35
6
35

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