MC9S08QG4MPAE Freescale Semiconductor, MC9S08QG4MPAE Datasheet - Page 137

IC MCU 4K FLASH 8-PDIP

MC9S08QG4MPAE

Manufacturer Part Number
MC9S08QG4MPAE
Description
IC MCU 4K FLASH 8-PDIP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08QG4MPAE

Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
4
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
HCS08
No. Of I/o's
6
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
S08QG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08QG8E
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
9.4.7.2
If ADACK is selected as the conversion clock, the ADC continues operation during stop3 mode. For
guaranteed ADC operation, the MCU’s voltage regulator must remain active during stop3 mode. Consult
the module introduction for configuration information for this MCU.
If a conversion is in progress when the MCU enters stop3 mode, it continues until completion. Conversions
can be initiated while the MCU is in stop3 mode by means of the hardware trigger or if continuous
conversions are enabled.
A conversion complete event sets the COCO and generates an ADC interrupt to wake the MCU from stop3
mode if the ADC interrupt is enabled (AIEN = 1).
9.4.8
The ADC module is automatically disabled when the MCU enters either stop1 or stop2 mode. All module
registers contain their reset values following exit from stop1 or stop2. Therefore the module must be
re-enabled and re-configured following exit from stop1 or stop2.
9.5
This section gives an example which provides some basic direction on how a user would initialize and
configure the ADC module. The user has the flexibility of choosing between configuring the module for
8-bit or 10-bit resolution, single or continuous conversion, and a polled or interrupt approach, among many
other options. Refer to
9.5.1
9.5.1.1
Before the ADC module can be used to complete conversions, an initialization procedure must be
performed. A typical sequence is as follows:
Freescale Semiconductor
1. Update the configuration register (ADCCFG) to select the input clock source and the divide ratio
used to generate the internal clock, ADCK. This register is also used for selecting sample time and
low-power configuration.
Initialization Information
MCU Stop1 and Stop2 Mode Operation
ADC Module Initialization Example
Stop3 Mode With ADACK Enabled
Initialization Sequence
It is possible for the ADC module to wake the system from low power stop
and cause the MCU to begin consuming run-level currents without
generating a system level interrupt. To prevent this scenario, software
should ensure that the data transfer blocking mechanism (discussed in
Section 9.4.4.2, “Completing
and continuing ADC conversions.
Hexadecimal values designated by a preceding 0x, binary values designated
by a preceding %, and decimal values have no preceding character.
Table
9-6,
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Table
9-7, and
Conversions) is cleared when entering stop3
Table 9-8
NOTE
NOTE
for information used in this example.
Analog-to-Digital Converter (S08ADC10V1)
135

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